Nanoelectronics and Advanced Packaging

나노전자 및 첨단패키징 연구실

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(1) AI memory/logic device
Our laboratory is engaged in the exploration and development of next-generation logic and memory components. These newly developed high-performance devices enable artificial intelligence computations that surpass the capabilities of existing silicon-based devices. By tailoring the device design to the specific characteristics of different materials such as high-mobility carbon nanotubes, high-stability two-dimensional materials, and high-current density oxide semiconductors, we are investigating the potential advantages that can be achieved through the integration of diverse materials.

(2) Monolithic 3D integrated system
The recently developed logic device and memory can be seamlessly integrated within a single three-dimensional (3D) structure on a silicon chip. In this context, the term "single 3D integration" refers to the vertical stacking of devices on a single wafer. By fabricating an arithmetic unit and memory on separate layers and connecting them through nano-sized vias, we can achieve a cross-stacked configuration. This novel integration approach allows for a significant enhancement in overall computational performance, potentially reaching a thousand-fold increase compared to existing silicon chips, owing to the substantial improvement in the connectivity between the computational unit and memory.

(3) 3D printing packaging
In the realm of semiconductor packaging, the scope has expanded beyond mere single-chip encapsulation or finishing, becoming a critical technology that profoundly impacts the overall performance of systems. This technology played a pivotal role in the success of Apple's latest masterpieces, the M1 and M2 processors. The purpose of packaging technology is twofold: to reduce the chip-to-chip distance and effectively manage the heat generated by these chips. To address this, our research focuses on the development of low-cost, customized packaging techniques utilizing state-of-the-art high-resolution 3D printing technology.

Major research field

Semiconductor Devices, Semiconductor Packaging

Desired field of research

Research Keywords and Topics

AI Semiconductor Devices, Monolithic 3D Integration, Advanced Packaging

Research Publications

J. Kwon et al., “Three-Dimensional Monolithic Integration in Flexible Printed Organic Transistors”, NATURE COMMUNICATIONS (2019)
J. Kwon et al., “Static and Dynamic Response Comparison of Printed, Single- and Dual-Gate 3-D Complementary Organic TFT Inverters”, IEEE ELECTRON DEVICE LETTERS (2019)
J. Kwon et al., “Three-Dimensional, Inkjet-Printed Organic Transistors and Integrated Circuits with 100% Yield, High Uniformity, and Long-Term Stability,” ACS NANO (2016)

Patents

“3D SRAM CORE CELL HAVING VERTICAL STACKING STRUCTURE AND CORE CELL ASSEMBLY COMPRISING THE SAME”, J. Kwon, S. Jung, J.-J. Kim, K. Cho, and S. Kyung, US10692935B2 (2020-06-23)
“Logic circuitry using three dimensionally stacked dual-gate thin-film transistors”, S. Jung and J. Kwon, US10403759B2 (2019-09-03)

국가과학기술표준분류

  • ED. 전기/전자
  • ED04. 반도체소자·시스템
  • ED0499. 달리 분류되지 않는 반도체소자/시스템

국가기술지도분류

  • 정보-지식-지능화 사회 구현
  • 010400. 반도체/나노 신소자 기술

녹색기술분류

  • 고효율화기술
  • 전력효율성 향상

6T분류

  • NT 분야
  • 나노소자 및 시스템
  • 030111. 나노전자 소자기술